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My design problem demands me to read the amplitude level of a 10ns pulse, for which I am trying to find multiple techniques that may be helpful.

input parameters:

pulse width :10ns-150ns

pulse repetition rate: 1Hz-50kHz

Approach 1:

I feel a pulse peak detection circuit would do my job, when I have read about peak detectors, I expect the waveform (shown is sinusoid, but what I need is pulse): enter image description here

The circuit I designed uses an LM6172, which is a very high speed op-amp that can serve my purpose. I want the discharge time to be 22us as my pulse can repeat at a rate of 20us, but what I observed at output is quite strange. enter image description here

Results obtained: enter image description here

Where exactly am I going wrong? If I was able to detect the peak after this stage I can extract its DC value and say what is the peak voltage value of the pulse.

Kindly suggest some more ideas that are possible.

Null
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kakeh
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  • What accuracy do you want and what time resolution would be acceptable were you to do it digitally via an ADC? – Andy aka Apr 04 '16 at 10:27
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    -1 for the gross disrespect, and closing because I'm not going to read this mess. Come back when you've dropped the "eh, I can dump any slop I want on these dweebs" attitude. – Olin Lathrop Apr 04 '16 at 11:00
  • @OlinLathrop can you please have a look at updated question and kindly open it – kakeh Apr 18 '16 at 07:51
  • @Andyaka please have a look at the updated question, here i want to use a peak detector approach in finding the peak of pulse, in the other question you answered i was using it for pulse stretch, i need both one for pulse repetition rate calculations and this one for power calculation – kakeh Apr 18 '16 at 08:04
  • @kakeh you haven't addressed my comment (above) so what can you expect me to say or do? I haven't closed this question. – Andy aka Apr 18 '16 at 08:09
  • @Andyaka i have withdrawn my idea of using a sample and hold circuit, instead i want to know alternate techniques, anyway i want the ADC resolution to be 200Mhz as input is 10ns. if there is no other way to measure pulse amplitude than using a costly ADC – kakeh Apr 18 '16 at 08:16
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    I made my comment weeks ago and I'm not going to start trawling thru all the detail again especially now that the question is closed. Sorry. – Andy aka Apr 18 '16 at 08:25

1 Answers1

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With all due respect, you need to hand off your design problem to someone who knows what he's doing. Building a S/H which will respond to a nanosecond pulse is a major undertaking, and if you have no experience along these lines (as you clearly don't), frankly I see no hope that you will succeed.

If you still want to have heartburn, I'd advise you use a high speed A/D converter like this one followed by a very high-speed digital peak detector instantiated in a high-speed FPGA.

You'll note, I hope that the ADC alone will cost you about 4,000 bucks, and the FPGA won't be cheap either. Plus, you'll have to design a printed circuit board to run at 4 GHz, which I'll bet is not currently in your skill set. Breadboards simply will not work. Don't even think about it. Oh yes, and the FPGA part is pretty clear, since FPGAs will easily handle 4 GHz. You might look into the Xilinx Virtex line.

EDIT - You have not specified your pulse frequency. If it's low enough, you could probably use a (very good) GHz digital oscilloscope configured as a data collection instrument. It would be configured as single trace, with remote access. When it detects a pulse, the host is notified and the trace data transferred. The host would then reset the scope and analyze the trace data to extract the peak amplitude. This would be somewhat less accurate than the ADC/FPGA route, simply because scopes don't bother with high-resolution ADCs. This approach would completely avoid the learning curve associated with roll-your-own hardware, but I have no idea if the system throughput would be adequate. If the scope has a deep memory, the data transfer would take a ferociously long time (a 1 Ms buffer at 8 bit/sample will take about 20 msec via USB 2).

FURTHER EDIT - Your op amp is too slow. While the 6172 does have the output capability to charge the output cap in the time required, it does not have the bandwidth. Furthermore, your diode has a trr of 4 nsec nominal, which is pretty much guaranteed to make closing the loop impossible in 10 nsec.

Your simulation problems are caused by a simple fact - your timebase is far too long. Try rerunning it a 100 nsec, and you'll see all sorts of problems.

WhatRoughBeast
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