I am looking for some kind of pin channel selector design for 16 signals, 0-5V. When a specific signal got high, I should get its number (address) over a 4 pins address. No simultaneous highs will occur.
I made an over simplification with 3 signals, and 2 address pins in the attached figure. I put three signals, and with the positive edge, I should recover the corresponding address -i.e. if the pin is the IN01, I should be able to get the "01" address through the OUT00 and OUT01 pins, and feed this into a uP for taking actions.
I could figure using RS latches for recovering the OUT00, but this procedure (could?) not be extensible at all for more signals and address pins. And surely with a single microprocessor accepting positive edging logic i could solve that straightfordwardly, but perhaps a uP could be too much for this.
Should I follow some Flip-Flop solution, or should discard them and seek for some digital programmable device?
Edit: The key functionality is called Priority Encoder, which can be implemented with a 74HC148, a delay line 2 Schmitt Trigger with \$R=10k\Omega\$, \$C=1uF\$, an additional Schmitt Trigger used as inverter, and an Universal Register 74HC194 used in parallel mode.

Priority Encoder. This can be implemented in combinational logic, does not require any clock or flip-flops. – MarkU Mar 19 '19 at 00:01